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CALL FOR PAPERS : DEC-2018

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Call for Paper Vol-7 Iss-02 Feb-2018

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Published Vol-07 Iss-01 Jan-18

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DESIGN AND OPTIMIZATION OF INTERDIGITAL CAPACITOR

Beeresha R S, A M Khan, Manjunath Reddy H V

Abstract: As the wireless communication system continues to progress, higher levels of integration, smaller size, lower weight, lower power consumption, higher performance, and lower product costs are required. The planar passive components (Inductor and capacitor) playa majorrole to design RF/Microwavecircuits. In this we paper propose a design and optimize inter digital capacitor using RT/Duriod substrate material. The substrate materials has lower dielectric constant (3.66) and tangent loss (0.0013). The physical parameters of interdigital capacitors directly depend on magnitude of the capacitanceand quality factor. The variation of physical parameters like fingers (N), finger width (W) and space between the fingers (S) arethe desired scale (in mm) will changethe capacitance value significantly. The interdigital capacitor is designed with the help of existing formulas and designed structures areoptimized. The EM (electromagnetic) simulation is done byusing NI/AWR tool. The observed results show that the designed capacitors can be smaller in size and display higher Quality factor (QF) at 600MHZ operating frequency.

Keywords: NI/AWR, Interdigital Capacitor, EM Simulation, MMIC, Microstrip line, Quality Factor

DOI: https://doi.org/10.15623/ijret.2016.0533016

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