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CALL FOR PAPERS : DEC-2018

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Call for Paper Vol-7 Iss-02 Feb-2018

IJRET invites papers from various engineering disciplines for Volume-07 Issue-02, Feb-2018.

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Published Vol-07 Iss-01 Jan-18

IJRET Volume-07 Issue-01, Jan-2018 is published now.

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A STUDY ON VARIOUS STRUCTURES OF ADDERS AND TO SUGGEST A BEST CHOICE FOR LOW POWER APPLICATIONS

C.Saravanakumar, R. Arjun, A. Goutham

Abstract: The basic building blocks of the arithmetic unit in a processor are adders. These adders are responsible for performing Arithmetic operations in most of the computing systems. Addition is the base for arithmetic operations such as multiplication and the basic adder cell can be modified to function as subtractor and also can be used for division. Therefore, one bit Full Adder cell is the most important and basic block of an arithmetic unit of a system. In today’s modern electronics world, low power engineering has a good market starting from mobile phones to hand held devices. So, in this paper a study is carried out on different structures of adder by considering power as the constraint and a best choice is suggested for low power applications.

Keywords: Adders, Low Power, Microwind

DOI: https://doi.org/10.15623/ijret.2016.0516062

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