CALL FOR PAPERS :
DEC-2018
| Submission Last Date |
:
|
30-Dec-2018
|
| Acceptance Notification
|
:
|
in 15 days
|
| Publication Date
|
:
|
in 5 days
|
FOR AUTHORS
FOR REVIEWERS
IJRET® PUBLICATIONS
DOWNLOADS
CONTACT US
NEWS & UPDATES
|
DESIGN AND IMPLEMENTATION OF CARRY SKIP ADDER USING AOI AND OAI
Shridhar H M, Karthik Y M
Abstract: Carry-skip adder (CSKA) (another name for it is called as carry-bypass adder) is an adder implementation which helps on the delay of a ripple-carry adder with less effort when it is compared with rest of other adders. The accepted or followed structure of the CSKA consist the different stages containing chain relation of full adders (FAs) (RCA block) and 2:1 multiplexer. The RCA blocks are connected one to one by 2:1 multiplexers, which we can place in further level structures. The configuration of the CSKA (i.e., the number of the FAs per stage) plays a very important role on speed in the adder. Over the period of time, several methods have been proposed to optimize the number of FAs used. Here we are presenting a method based on AND-OR-Invert (AOI) and OR-AND-Invert (OAI) compound gates logic is used to replace the MUX logic being used in traditional design. The presented methodology is about the comparison of power, energy and delay parameters with other existing adders.
Keywords: Carry-Skip Adder, 2:1 Multiplexer, AND-OR-Invert, OR-AND-Invert (OAI)
DOI: https://doi.org/10.15623/ijret.2016.0516052
|
|