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CALL FOR PAPERS : DEC-2018

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Call for Paper Vol-7 Iss-02 Feb-2018

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Published Vol-07 Iss-01 Jan-18

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DESIGN OF A 4-BIT NON-VOLATILE SRAM USING MAGNETIC TUNNEL JUNCTION

D. Ane Delphin, Electa Alice A., Ambily Babu

Abstract: In this paper, we propose a non-volatile SRAM, which presents simultaneously low power dissipation and high speed. This SRAM is based on MRAM (Magnetic RAM technology on standard CMOS. In this non-volatile SRAM design, we use Magnetic Tunnel Junctions (MTJ) as storage element. A 4-bit SRAM cell is designed and its read-write operations are described. Sense Amplifier is used in the read operation model. Two Write-Enable transistors and two inverters are used in the write operation model. The 4-bit SRAM cell has been implemented using Tanner tool. The operation of the SRAM cell is clearly understood from the output waveforms obtained after implementation. The structure and working of Magnetic Tunnel Junction is studied. The design of a Non-Volatile SRAM using Magnetic Tunnel Junction is proposed.

Keywords: SRAM, MRAM, MTJ.

DOI: https://doi.org/10.15623/ijret.2016.0516039

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