A VLSI IMPLEMENTATION OF A RESOURCE EFFICIENT AND SECURE ARCHITECTURE OF A BLOCK CIPHER

Satish Shivaram, R.Krishna, Vijayaprakash, K.V.Prasad

Abstract: In today‘s modern life, the protection of data is of major concern in any kind of domian. So the understanding of cryptography architecture plays a crucial role. Advance encryption system , differential encryption system design of cryptography have few drawbacks in implementation level of low level designs. In an area concerned and power concerned parameters the above mentioned algorithms have failed in implementing. The humming bird algorithm uses block cipher which is being used in this paper for encryption and decryption using 128 bit secure key. Block cipher concentrates on converting the given original data into cipher text to make the given data more secure over the user. Two different designs of block Cipher algorithms (Throughput enhanced , Area reduced) are developed and their performance is compared in terms of area occupation using Xilinx ISE design tool with verilog language. The block cipher designs are implemented using 64 bit secure key and 128 bit secure key. The area reduced design is of the concern to have this module on the FPGA implementation in the VLSI sector.

Keywords: Cryptography, VLSI, FPGA , Block Cipher.

DOI: https://doi.org/10.15623/ijret.2016.0508032