PERFORMANCE ANALYSIS AND IMPLEMENTATION OF MODIFIED SDM BASED NOC FOR MPSOC ON SPARTAN6 FPGA

Y. Amar Babu, G.M.V.Prasad

Abstract: To meet todays demanding requirements lowpower consumption, high performance while maintaing flexibility and scalability, system-On-Chip will combine several number of processors cores and other IPs with network-On-chip. To implement NoC based MPSoC on an FPGA, NoCs should provide guaranteed services and be run-time reconfigurable. Current TDM and SDM based NoCs takes more area and would not support run-time reconfiguration. This paper presents modified spatial division multiplexing based NoC on FPGA, in this we have modified complex network interface and proposed flexible network interface and efficient SDM based NoC.This architecture explored feasibility of connection requirements from IP cores during run-time.

Keywords: NoC, MPSoC, FPGA, NoCs, SDM Based NoC

DOI: https://doi.org/10.15623/ijret.2016.0502062