CASCADED H-BRIDGE MULTILEVEL INVERTER IN A THREE PHASE ELEVEN LEVEL

Aditya Parashar, Praveen Bansal

Abstract: This paper essentially concentrates on the design and implementation of a unique topology for a three phase eleven level cascaded H-bridge multilevel cluverter by employing different kinds of switching schemes. The basic purpose of this paper is to enhance the number of voltage level at the output without addition of any complexity to power circuit. The main advantages of this proposed topology is to scale down the THD and reducing electromagnetic interface EMI generation and high voltage with very close to sine waveform. In this paper, severel kinds of carrier pulse width modulation techniques are proposed as which scale down the total harmonic distortion and improve the out voltage from the proposed topology and POD modulation techniques reduce the THD. A number of H-bridge arranged in cascaded to increase the voltage level with the different switching schemes analyzed in this paper. It is observed that this new topology can be recommended to three phase eleven level cascaded H-bridge inverter for the best and optimum performance over the conventional methods. This performance in optimized in the eleven level of inverter. Improving the fundamental waveforms and reducing the total harmonic distortion by using 60 IGBTs and switching is arranged by a topology in cascaded manners. The simulation model is produced by MATLAB2009 software version

Keywords: Cascaded H-bridge multilevel inverter, different phase pulse width modulation, total harmonic distortionTHD, EMI

DOI: https://doi.org/10.15623/ijret.2015.0408078