SERIAL INTERFACE MODULE FOR ETHERNET BASED APPLICATIONS

Shamala Joshi B, Padmaja Jain, Aruna Kumari

Abstract: The introduction of Field Programmable Gate Arrays (FPGAs) which includes thousands of logic gates has made it feasible to prove specific software function on the particular hardware. This reduces the design time and the execution time and makes the embedded system to respond faster as a real time system. This paper serial interface module for Ethernet based Applications deals with the Study and the implementation of the Tri-mode Ethernet Media access control (TEMAC) which is present in the FPGA core. The Virtex-5 FPGA supports the 10Mbps, 100Mbps as well as 1000Mbps but in this paper contains the implementation of 1000Mbps (1Gigabit bits per second) data transfer rate. This project basically deals with communication established between the FPGA core and the PC. The IP core is interfaced with its transceiver module and communicated to the PC using Ethernet medium. The communication established is verified by interfacing the FIFO and the UART VHDL codes to the TEMAC IP core present on the Virtex-5 FPGA. The result at each module is verified on the Chipscope pro analyzer and the packet transmitted from FPGA to the PC is verified on the Wireshark software.

Keywords: FPGA, Ethernet, TEMAC core , and Gigabit.

DOI: https://doi.org/10.15623/ijret.2015.0408050