DESIGN OF LOW POWER IMPROVED MEDIANFILTER CORE FOR NOISE REDUCTION IN IMAGE

Vinothini M, Syed Ibrahim B, A.Kavitha

Abstract: In digital image processing, image restoration is a prime factor which is often able to perform some kind of noise reduction on the image. Reduction of impulse or salt & pepper noise is done by non – linear filtering technique such as the median filter. Here the median filter is designed basically using the comparator and the multiplexer. So, it is essential to develop a new design technique to reduce the power consumption in the median filter. Thereby the comparator and multiplexer used in the median filter is designed using various styles of full adder with help of the cadence 0.18nm technology.

Keywords: Multiplexer, Full Adder (FA), Comparator, Power

DOI: https://doi.org/10.15623/ijret.2015.0406015