LOW COMPLEXITY DESIGN OF NON-BINARY LDPC DECODER USING EXTENDED MIN-SUM ALGORITHM

C.S.Elamaran, M.Anbuselvi

Abstract: Low Density Parity Check (LDPC) codes, is a linear block code having the decoding performance closer to Shannon’s limit. Nonbinary LDPC is the class of binary LDPC, which works on the higher order Galois field. The decoding performance of non-binary (NB) LDPC is better than binary LDPC for moderate code lengths. The increased computation with the increased order of field is the major challenge in hardware realization of NB-LDPC. The extension of conventional sum-product algorithm, known as extended Min-Sum (EMS) algorithm, with reduced computational complexity is used in this paper. However, a tradeoff exists between computational complexity and decoding performance. This paper aims at reducing the computational complexity by focusing on the Parity Check Matrix (PCM) modifications. The bottleneck of the design is large memory requirement and more computation intensive. The modification in the EMS algorithm can be incorporated to design low complexity hardware architecture of NB-LDPC decoder.

Keywords: Non-binary; LDPC; EMS algorithm; PCM

DOI: https://doi.org/10.15623/ijret.2015.0404011