A SIMPLIFIED DESIGN OF MULTIPLIER FOR MULTI LAYER FEED FORWARD HARDWARE NEURAL NETWORKS

V.Parthasarathy, B.C.Hemapriya, H.M.Ravikumar

Abstract: In the span of last twenty years, a lot of software solutions were proposed to utilize the inherent parallelism of the Artificial Neural Networks (ANNs). In order to take the full advantage of Neural Networks, dedicated hardware implementations are essentially required. But still, very few hardware models of multi layer feed forward networks with simplified activation functions are available today. Hence the effective utilization of Hardware neural Networks (HNNs) is restricted to only simple applications rather than complex power system problems. This paper analyzes the complications in the HNN design and a simplified algorithm for designing the multiplier part of a HNN is proposed. A comparison between existing and proposed model is provided.

Keywords: Hardware Neural Networks, Multipliers, Multi layer feed forward networks

DOI: https://doi.org/10.15623/ijret.2014.0324009