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Authors will receive one hard copy of full paper, individual print certificates and digital certificates, Submit Manuscript

CALL FOR PAPERS : DEC-2018

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Call for Paper Vol-7 Iss-02 Feb-2018

IJRET invites papers from various engineering disciplines for Volume-07 Issue-02, Feb-2018.

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Published Vol-07 Iss-01 Jan-18

IJRET Volume-07 Issue-01, Jan-2018 is published now.

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FPGA BASED ENCRYPTION DESIGN USING VHDL

Kumar Anubhav Tiwari, Kasturi Chakrabarty, B. Ram, Ajay Kumar Trivedi

Abstract: The job of cryptographers is quite crucial as they are responsible to keep privacy of personal information and indirectly the protection of national security. The efficient encryption method ensures the information security. Here VHDL (Very high speed integrated circuits Hardware Description Language) and FPGA (Field Programmable Gate Arrays technology) are used for highly efficient encryption design to secure the information over open network transmission. The proposed work is a composite encryption technique comprised of transposition and substitution to generate complex encipherment. The design is implemented and tested in Xilinx ISE.9.2. A final result signifies the efficiency and reliability for FPGA (SPARTAN-3) device

Keywords: VHDL, FPGA, Encryption, Xilinx ISE.9.2

DOI: https://doi.org/10.15623/ijret.2014.0322032

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