DESIGN OF RING VCO USING NINE STAGES OF DIFFERENTIAL AMPLIFIER

Fahmida Khatoon, Tarana A chandel

Abstract: The proposed ring oscillator is fundamentally constructed by cascading series of delay cells, complying with the Barkhausen oscillation criterion of gain and phase shift. Focusing the need of low voltage design, which leads to an increased delay cell integration The number of delay cell reflects a high speed with low power consumption. Barkhausen criterion highlights the need of increased number of cascade differential amplifier based delay cell. To overcome the constraint of power dissipation, VCOs with reduced number of delay stages and the operation of sub threshold region has been widely used. In this paper a low power voltage controlled ring oscillator is implemented using the 250nm CMOS technology provided by generic with 2.5 volt power supply. The circuit is a modification of conventional ring oscillator. In favor of easy implementation of the module in small die size a nine stages of differential amplifier has been adopted to fabricate the proposed VCRO. The optimization design are done using S-EDIT software to make the oscillator as small as possible. In, addition Tanner tools is used in the analysis and simulation to verify the predicted performance. The proposed design is suitable for PLL and Timer circuits. The optimized ring oscillator is then compared with the previous design done by other researchers. The existence of various topologies of high-frequency ring oscillator highlight an essential design breakthrough optimizing to the power dissipation and tuning range of 125 MHz-561.798 MHz. The ring oscillator is able to operate with 2.5v supply and consuming around 3.6mwatt.

Keywords: VCRO, CMOS, Low Power, Differential Amplifier

DOI: https://doi.org/10.15623/ijret.2014.0322025