DESIGN OF A 5 PORT ROUTER FOR NOC USING VERILOG

SOMASHEKHAR, REKHA S

Abstract: Multiprocessor system on chip is emerging as a new trend for System on chip design but the wire and power design constraints are forcing adoption of new design methodologies. Researchers pursued a scalable solution to this problem i.e. Network on Chip (NOC). Network on chip architecture better supports the integration of SOC consists of on chip packet switched network. The proposed design of router is simulated and synthesized in Xilinx ISE 9.2iand the source code is written in Verilog

Keywords: Network on Chip, 5 port router, Xilinx ISE 9.2i

DOI: https://doi.org/10.15623/ijret.2014.0315170