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Authors will receive one hard copy of full paper, individual print certificates and digital certificates, Submit Manuscript

CALL FOR PAPERS : DEC-2018

Submission Last Date :  30-Dec-2018
Acceptance Notification :  in 15 days
Publication Date :  in 5 days
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Call for Paper Vol-7 Iss-02 Feb-2018

IJRET invites papers from various engineering disciplines for Volume-07 Issue-02, Feb-2018.

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Published Vol-07 Iss-01 Jan-18

IJRET Volume-07 Issue-01, Jan-2018 is published now.

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DESIGN & DEVELOPMENT OF EMBEDDED APPLICATION SOFTWARE FOR INTERFACE PROCESSING UNIT (IPU)

A Sai Krishna, P.Alekya, M. Satya Anuradha, P. A. Harsha Vardhini, S.R Pankaj Kumar

Abstract: The objective of this project is to design, develop and implement the Digital Glue Logic (DGL) in VHDL for Interface processing unit (IPU) Sub-system. The IPU sub-system consists of two major components, Blanking Interface Module (BIM) and Gyro Interface Module (GIM). The Digital Glue Logic for both the above modules is to be designed, developed and implemented individually in standalone mode and sequential integration of both the modules, porting on a Virtex-4 FPGA based XILINX evaluation platform.

Keywords: Power processor, BIM, GIM, Digital Glue Logic

DOI: https://doi.org/10.15623/ijret.2014.0309033

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