DESIGN OF LOW POWER BARREL SHIFTER AND ROTATOR USING TWO PHASE CLOCKED ADIABATIC STATIC CMOS LOGIC

Anchu Tom, Vishal Shankarrao Muley, Vigneswaran.T

Abstract: This paper presents low power operation of barrel shifter and rotator which are designed and simulated in 2 phase clocked adiabatic static CMOS logic. The power consumption of the circuits is compared with that of static CMOS logic. A barrel logic right shifter, a right rotator and shift/rotator are simulated in 45nm CMOS process technology. A mux based design is used for all the above circuits. The 2PASCL circuits are observed to have low power consumption while compared to circuits which are simulated using static CMOS logic. The power consumption of 2PASCL circuits are reduced by 69.67% compared to static CMOS logic. From the simulation results it is observed that the logic circuits which use 2PASCL logic can be used for low power applications.

Keywords: barrel shifter, logical shift, rotation, adiabatic, two phase clock.

DOI: https://doi.org/10.15623/ijret.2014.0309002