ENHANCED LOW POWER, FAST AND AREA EFFICIENT CARRY SELECT ADDER

Prajwal S

Abstract: Adder being the basic hardware block of any arithmetic operation, the major constraint in the field of signal processors, data processors to perform any operations is highly dependent on the adder performance of the circuit. The gate level implementation of the carry select adder (CSLA) and modified carry select adder has significantly reduced the area and power consumption which replaced the ripple carry adder (RCA) used in modified CSLA with MUX based Full Adder (MUX-FA) block has further reduced the power consumption by efficiently utilizing the area with faster performance.

Keywords: Application-specific integrated circuit (ASIC), area efficient, MUX-FA, CSLA, low power.

DOI: https://doi.org/10.15623/ijret.2014.0305081