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CALL FOR PAPERS : DEC-2018

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Call for Paper Vol-7 Iss-02 Feb-2018

IJRET invites papers from various engineering disciplines for Volume-07 Issue-02, Feb-2018.

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Published Vol-07 Iss-01 Jan-18

IJRET Volume-07 Issue-01, Jan-2018 is published now.

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FPGA-BASED INTERFACING FOR 8-BIT AND 32-BIT ELECTRONIC DEVICES

Prateek Khurana, Rajat Arora, Monika Nagaria, Megha Sharma, Rajendra Bahadur Singh

Abstract: Most of the earlier electronic devices used buses with lesser number of bits but with the advancement in technology, devices having buses with larger number of bits are available in the market. Thus, there is an urging need to interface both these old and new technologies. In this paper, an interfacing unit has been proposed to interface the devices using buses with lower number of bits and higher number of bits. In the present work, two types of circuits are used for interfacing these devices; those have been termed as UPSIZER and DOWNSIZER circuit. Upsizer concatenates the bits generated by a lower bit device and sends it to a higher bit device. On the other hand, Downsizer divides the bits generated by higher bit devices and send it to lower bit devices.

Keywords: FPGA; Verilog; Xilinx; Interfacing Unit; Microprocessors; VLSI

DOI: https://doi.org/10.15623/ijret.2014.0305070

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