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CALL FOR PAPERS : DEC-2018

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Call for Paper Vol-7 Iss-02 Feb-2018

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DESIGNING OF CORDIC PROCESSOR IN VERILOG USING XILINX ISE SIMULATOR

Swati Sharma, Mohit Bansal

Abstract: In this paper, designing of CORDIC Processor in Verilog to determine the sine and cosine of a given argument, and extending this code to determine the Cartesian co-ordinates of a complex number represented in Euler’s form. The inputs given are the Cartesian vector and the input angle in 17- bit signed number representation. The outputs obtained are sine and cosine of the input angle. To determine the Cartesian co-ordinates of the complex number, the magnitude of the complex number is given as input along with the input angle. The language used for the designing of CORDIC Processor is Verilog. The software used for the simulation is Xilinx ISE Simulator.

Keywords: CORDIC Processor, Verilog, Cartesian co-ordinates, and Cartesian co-ordinates, Simulator etc

DOI: https://doi.org/10.15623/ijret.2014.0305064

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