AN APPLICATION SPECIFIC RECONFIGURABLE ARCHITECTURE FOR FAULT TESTING AND DIAGNOSIS: A SURVEY

A.R Kasetwar, Gaurav Kumar, S. M. Gulhane

Abstract: Now a day’s many VLSI designers are implementing different applications on real time with the use of FPGAs. Although they are working efficiently, they are not achieving their expected goals. This is only because of the faults which are occurring in the FPGA at the runtime of the application. Those faults are remaining in the circuitry as there is no provision for removal of those faults at application level. So there is a great need of detection & removal of faults. Mainly Interconnect faults, Logical Faults and Delay are the faults which reduces the performance of FPGA. Although the manufacturers are trying to decrease the fault present in the FPGA, it is very necessary to remove those faults at run time of the particular application. This paper includes the brief discussion about the occurrence of different faults and various methods to remove those faults

Keywords: Fault diagnosis, field-programmable gate array (FPGA), testing.

DOI: https://doi.org/10.15623/ijret.2014.0302115