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CALL FOR PAPERS : DEC-2018

Submission Last Date :  30-Dec-2018
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Call for Paper Vol-7 Iss-02 Feb-2018

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Published Vol-07 Iss-01 Jan-18

IJRET Volume-07 Issue-01, Jan-2018 is published now.

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EFFICIENT RECONFIGURABLE ARCHITECTURE OF BASEBAND DEMODULATOR IN SDR

Keyur Konkani

Abstract: This paper presents the simulation architecture and performance analysis with the use of ZCD technic. A Zero-Crossing based AllDigital Baseband Demodulation architecture is proposed in this work. This architecture supports demodulation of all modulation schemes including MSK, PSK, FSK, and QAM. The proposed structure is very low area, low power, and low latency and can operate in real-time. Moreover it can switch, in run-time, between multiple modulation schemes like GMSK (GSM), QPSK (CDMA), GFSK (Bluetooth), 8-PSK (EDGE), Offset-QPSK (W-CDMA), etc. In addition, the phase resolution of the demodulator is scalable with performance. In addition, bit-wise amplitude quantization based quad-decomposition approach is utilized to demodulate higher order M-ary QAM modulations such as 16-QAM & 64-QAM, which is also a highly scalable architecture. This structure of demodulator provides energy-efficient and resource-efficient implementation of various wireless standards in physical layer of SDR.

Keywords: Physical layer, Mobile and Wireless Communication, Software Defined radio (SDR), Zero Cross Detection (ZCD), Modulation Schemes, Architecture, high level synthesis, FPGA.

DOI: https://doi.org/10.15623/ijret.2014.0302094

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