A NOVEL APPROACH FOR HIGH SPEED CONVOLUTION OF FINITE AND INFINITE LENGTH SEQUENCES USING VEDIC MATHEMATICS

M.Bharathi, D.Leela Rani

Abstract: Digital signal processing, Digital control systems, Telecommunication, Audio and Video processing are important applications in VLSI. Design and implementation of DSP systems with advances in VLSI demands low power, efficiency in energy, portability, reliability and miniaturization. In digital signal processing, linear-time invariant systems are important sub-class of systems and are the heart and soul of DSP. In many application areas, linear and circular convolution are fundamental computations. Convolution with very long sequences is often required. Discrete linear convolution of two finite-length and infinite length sequences using circular convolution on for Overlap-Add and Overlap-Save methods can be computed. In real-time signal processing, circular convolution is much more effective than linear convolution. Circular convolution is simpler to compute and produces less output samples compared to linear convolution. Also linear convolution can be computed from circular convolution. In this paper, both linear, circular convolutions are performed using vedic multiplier architecture based on vertical and cross wise algorithm of Urdhva-Tiryabhyam. The implementation uses hierarchical design approach which leads to improvement in computational speed, power reduction, minimization in hardware resources and area. Coding is done using Verilog HDL. Simulation and synthesis are performed using Xilinx FPGA.

Keywords: Linear and Circular convolution, Urdhva - Tiryagbhyam, carry save multiplier, Overlap –Add/ Save Verilog HDL.

DOI: https://doi.org/10.15623/ijret.2013.0211100