CALL FOR PAPERS :
DEC-2018
| Submission Last Date |
:
|
30-Dec-2018
|
| Acceptance Notification
|
:
|
in 15 days
|
| Publication Date
|
:
|
in 5 days
|
FOR AUTHORS
FOR REVIEWERS
IJRET® PUBLICATIONS
DOWNLOADS
CONTACT US
NEWS & UPDATES
|
FPGA IMPLEMENTATION OF OPTIMAL STEP SIZE NLMS ALGORITHM AND ITS PERFORMANCE ANALYSIS
L. Bharani, P. Radhika
Abstract: The Normalized Least Mean Square error (NLMS) algorithm is most popular due to its simplicity. The conflicts of fast convergence and low excess mean square error associated with a fixed step size NLMS are solved by using an optimal step size NLMS algorithm. The main objective of this paper is to derive a new nonparametric algorithm to control the step size and also the theoretical performance analysis of the steady state behavior is presented in the paper. The simulation experiments are performed in Matlab. The simulation results show that the proposed algorithm as superior performance in Fast convergence rate, low error rate, and has superior performance in noise cancellation.
Keywords: Least Mean square algorithm (LMS), Normalized least mean square algorithm (NLMS)
DOI: https://doi.org/10.15623/ijret.2013.0205027
|
|