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CALL FOR PAPERS : DEC-2018

Submission Last Date :  30-Dec-2018
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Call for Paper Vol-7 Iss-02 Feb-2018

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Published Vol-07 Iss-01 Jan-18

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LOW POWER SRAM USING ATD CIRCUIT

Himanshu J. Shah, Veerendrasingh Tiwari

Abstract: The address signal lines are connected to a semiconductor memory device when they are implemented on the PCB (Printed Circuit Board). So they experience the wiring capacitance and due to this wiring capacitance on printed circuit board the rising and falling time of respective address signal disperse. If the address signal lines change in timing, the following problem occurs. When a microprocessor connected to a semiconductor memory device changes the address information from one address to another address, due to deviation of timing of the change of the signal, the wrong address is generated. In an Asynchronous semiconductor memory device, the change of address is immediately responded. So it also responds to such wrong address information and internal circuit selects the wrong address information and operates corresponds to that wrong address.

Keywords: OFDM, STBC, SWTICHING, PATH FADING.

DOI: https://doi.org/10.15623/ijret.2013.0203009

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